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comparison nss/lib/freebl/chacha20/chacha20_vec.c @ 0:1e5118fa0cb1

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This is NSS with a Cmake Buildsyste To compile a static NSS library for Windows we've used the Chromium-NSS fork and added a Cmake buildsystem to compile it statically for Windows. See README.chromium for chromium changes and README.trustbridge for our modifications.
author Andre Heinecke <andre.heinecke@intevation.de>
date Mon, 28 Jul 2014 10:47:06 +0200
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1 /* This Source Code Form is subject to the terms of the Mozilla Public
2 * License, v. 2.0. If a copy of the MPL was not distributed with this
3 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
4
5 /* This implementation is by Ted Krovetz and was submitted to SUPERCOP and
6 * marked as public domain. It was been altered to allow for non-aligned inputs
7 * and to allow the block counter to be passed in specifically. */
8
9 #include <string.h>
10
11 #include "chacha20.h"
12
13 #ifndef CHACHA_RNDS
14 #define CHACHA_RNDS 20 /* 8 (high speed), 20 (conservative), 12 (middle) */
15 #endif
16
17 /* Architecture-neutral way to specify 16-byte vector of ints */
18 typedef unsigned vec __attribute__ ((vector_size (16)));
19
20 /* This implementation is designed for Neon, SSE and AltiVec machines. The
21 * following specify how to do certain vector operations efficiently on
22 * each architecture, using intrinsics.
23 * This implementation supports parallel processing of multiple blocks,
24 * including potentially using general-purpose registers.
25 */
26 #if __ARM_NEON__
27 #include <arm_neon.h>
28 #define GPR_TOO 1
29 #define VBPI 2
30 #define ONE (vec)vsetq_lane_u32(1,vdupq_n_u32(0),0)
31 #define LOAD(m) (vec)(*((vec*)(m)))
32 #define STORE(m,r) (*((vec*)(m))) = (r)
33 #define ROTV1(x) (vec)vextq_u32((uint32x4_t)x,(uint32x4_t)x,1)
34 #define ROTV2(x) (vec)vextq_u32((uint32x4_t)x,(uint32x4_t)x,2)
35 #define ROTV3(x) (vec)vextq_u32((uint32x4_t)x,(uint32x4_t)x,3)
36 #define ROTW16(x) (vec)vrev32q_u16((uint16x8_t)x)
37 #if __clang__
38 #define ROTW7(x) (x << ((vec){ 7, 7, 7, 7})) ^ (x >> ((vec){25,25,25,25}))
39 #define ROTW8(x) (x << ((vec){ 8, 8, 8, 8})) ^ (x >> ((vec){24,24,24,24}))
40 #define ROTW12(x) (x << ((vec){12,12,12,12})) ^ (x >> ((vec){20,20,20,20}))
41 #else
42 #define ROTW7(x) (vec)vsriq_n_u32(vshlq_n_u32((uint32x4_t)x,7),(uint32x4_t)x,25)
43 #define ROTW8(x) (vec)vsriq_n_u32(vshlq_n_u32((uint32x4_t)x,8),(uint32x4_t)x,24)
44 #define ROTW12(x) (vec)vsriq_n_u32(vshlq_n_u32((uint32x4_t)x,12),(uint32x4_t)x,20)
45 #endif
46 #elif __SSE2__
47 #include <emmintrin.h>
48 #define GPR_TOO 0
49 #if __clang__
50 #define VBPI 4
51 #else
52 #define VBPI 3
53 #endif
54 #define ONE (vec)_mm_set_epi32(0,0,0,1)
55 #define LOAD(m) (vec)_mm_loadu_si128((__m128i*)(m))
56 #define STORE(m,r) _mm_storeu_si128((__m128i*)(m), (__m128i) (r))
57 #define ROTV1(x) (vec)_mm_shuffle_epi32((__m128i)x,_MM_SHUFFLE(0,3,2,1))
58 #define ROTV2(x) (vec)_mm_shuffle_epi32((__m128i)x,_MM_SHUFFLE(1,0,3,2))
59 #define ROTV3(x) (vec)_mm_shuffle_epi32((__m128i)x,_MM_SHUFFLE(2,1,0,3))
60 #define ROTW7(x) (vec)(_mm_slli_epi32((__m128i)x, 7) ^ _mm_srli_epi32((__m128i)x,25))
61 #define ROTW12(x) (vec)(_mm_slli_epi32((__m128i)x,12) ^ _mm_srli_epi32((__m128i)x,20))
62 #if __SSSE3__
63 #include <tmmintrin.h>
64 #define ROTW8(x) (vec)_mm_shuffle_epi8((__m128i)x,_mm_set_epi8(14,13,12,15,10,9,8,11,6,5,4,7,2,1,0,3))
65 #define ROTW16(x) (vec)_mm_shuffle_epi8((__m128i)x,_mm_set_epi8(13,12,15,14,9,8,11,10,5,4,7,6,1,0,3,2))
66 #else
67 #define ROTW8(x) (vec)(_mm_slli_epi32((__m128i)x, 8) ^ _mm_srli_epi32((__m128i)x,24))
68 #define ROTW16(x) (vec)(_mm_slli_epi32((__m128i)x,16) ^ _mm_srli_epi32((__m128i)x,16))
69 #endif
70 #else
71 #error -- Implementation supports only machines with neon or SSE2
72 #endif
73
74 #ifndef REVV_BE
75 #define REVV_BE(x) (x)
76 #endif
77
78 #ifndef REVW_BE
79 #define REVW_BE(x) (x)
80 #endif
81
82 #define BPI (VBPI + GPR_TOO) /* Blocks computed per loop iteration */
83
84 #define DQROUND_VECTORS(a,b,c,d) \
85 a += b; d ^= a; d = ROTW16(d); \
86 c += d; b ^= c; b = ROTW12(b); \
87 a += b; d ^= a; d = ROTW8(d); \
88 c += d; b ^= c; b = ROTW7(b); \
89 b = ROTV1(b); c = ROTV2(c); d = ROTV3(d); \
90 a += b; d ^= a; d = ROTW16(d); \
91 c += d; b ^= c; b = ROTW12(b); \
92 a += b; d ^= a; d = ROTW8(d); \
93 c += d; b ^= c; b = ROTW7(b); \
94 b = ROTV3(b); c = ROTV2(c); d = ROTV1(d);
95
96 #define QROUND_WORDS(a,b,c,d) \
97 a = a+b; d ^= a; d = d<<16 | d>>16; \
98 c = c+d; b ^= c; b = b<<12 | b>>20; \
99 a = a+b; d ^= a; d = d<< 8 | d>>24; \
100 c = c+d; b ^= c; b = b<< 7 | b>>25;
101
102 #define WRITE_XOR(in, op, d, v0, v1, v2, v3) \
103 STORE(op + d + 0, LOAD(in + d + 0) ^ REVV_BE(v0)); \
104 STORE(op + d + 4, LOAD(in + d + 4) ^ REVV_BE(v1)); \
105 STORE(op + d + 8, LOAD(in + d + 8) ^ REVV_BE(v2)); \
106 STORE(op + d +12, LOAD(in + d +12) ^ REVV_BE(v3));
107
108 void ChaCha20XOR(
109 unsigned char *out,
110 const unsigned char *in,
111 unsigned int inlen,
112 const unsigned char key[32],
113 const unsigned char nonce[8],
114 uint64_t counter)
115 {
116 unsigned iters, i, *op=(unsigned *)out, *ip=(unsigned *)in, *kp;
117 #if defined(__ARM_NEON__)
118 unsigned *np;
119 #endif
120 vec s0, s1, s2, s3;
121 #if !defined(__ARM_NEON__) && !defined(__SSE2__)
122 __attribute__ ((aligned (16))) unsigned key[8], nonce[4];
123 #endif
124 __attribute__ ((aligned (16))) unsigned chacha_const[] =
125 {0x61707865,0x3320646E,0x79622D32,0x6B206574};
126 #if defined(__ARM_NEON__) || defined(__SSE2__)
127 kp = (unsigned *)key;
128 #else
129 ((vec *)key)[0] = REVV_BE(((vec *)key)[0]);
130 ((vec *)key)[1] = REVV_BE(((vec *)key)[1]);
131 nonce[0] = REVW_BE(((unsigned *)nonce)[0]);
132 nonce[1] = REVW_BE(((unsigned *)nonce)[1]);
133 nonce[2] = REVW_BE(((unsigned *)nonce)[2]);
134 nonce[3] = REVW_BE(((unsigned *)nonce)[3]);
135 kp = (unsigned *)key;
136 np = (unsigned *)nonce;
137 #endif
138 #if defined(__ARM_NEON__)
139 np = (unsigned*) nonce;
140 #endif
141 s0 = LOAD(chacha_const);
142 s1 = LOAD(&((vec*)kp)[0]);
143 s2 = LOAD(&((vec*)kp)[1]);
144 s3 = (vec) {
145 counter & 0xffffffff,
146 counter >> 32,
147 ((uint32_t*)nonce)[0],
148 ((uint32_t*)nonce)[1]
149 };
150
151 for (iters = 0; iters < inlen/(BPI*64); iters++) {
152 #if GPR_TOO
153 register unsigned x0, x1, x2, x3, x4, x5, x6, x7, x8,
154 x9, x10, x11, x12, x13, x14, x15;
155 #endif
156 #if VBPI > 2
157 vec v8,v9,v10,v11;
158 #endif
159 #if VBPI > 3
160 vec v12,v13,v14,v15;
161 #endif
162
163 vec v0,v1,v2,v3,v4,v5,v6,v7;
164 v4 = v0 = s0; v5 = v1 = s1; v6 = v2 = s2; v3 = s3;
165 v7 = v3 + ONE;
166 #if VBPI > 2
167 v8 = v4; v9 = v5; v10 = v6;
168 v11 = v7 + ONE;
169 #endif
170 #if VBPI > 3
171 v12 = v8; v13 = v9; v14 = v10;
172 v15 = v11 + ONE;
173 #endif
174 #if GPR_TOO
175 x0 = chacha_const[0]; x1 = chacha_const[1];
176 x2 = chacha_const[2]; x3 = chacha_const[3];
177 x4 = kp[0]; x5 = kp[1]; x6 = kp[2]; x7 = kp[3];
178 x8 = kp[4]; x9 = kp[5]; x10 = kp[6]; x11 = kp[7];
179 x12 = (counter & 0xffffffff)+BPI*iters+(BPI-1); x13 = counter >> 32;
180 x14 = np[0]; x15 = np[1];
181 #endif
182 for (i = CHACHA_RNDS/2; i; i--) {
183 DQROUND_VECTORS(v0,v1,v2,v3)
184 DQROUND_VECTORS(v4,v5,v6,v7)
185 #if VBPI > 2
186 DQROUND_VECTORS(v8,v9,v10,v11)
187 #endif
188 #if VBPI > 3
189 DQROUND_VECTORS(v12,v13,v14,v15)
190 #endif
191 #if GPR_TOO
192 QROUND_WORDS( x0, x4, x8,x12)
193 QROUND_WORDS( x1, x5, x9,x13)
194 QROUND_WORDS( x2, x6,x10,x14)
195 QROUND_WORDS( x3, x7,x11,x15)
196 QROUND_WORDS( x0, x5,x10,x15)
197 QROUND_WORDS( x1, x6,x11,x12)
198 QROUND_WORDS( x2, x7, x8,x13)
199 QROUND_WORDS( x3, x4, x9,x14)
200 #endif
201 }
202
203 WRITE_XOR(ip, op, 0, v0+s0, v1+s1, v2+s2, v3+s3)
204 s3 += ONE;
205 WRITE_XOR(ip, op, 16, v4+s0, v5+s1, v6+s2, v7+s3)
206 s3 += ONE;
207 #if VBPI > 2
208 WRITE_XOR(ip, op, 32, v8+s0, v9+s1, v10+s2, v11+s3)
209 s3 += ONE;
210 #endif
211 #if VBPI > 3
212 WRITE_XOR(ip, op, 48, v12+s0, v13+s1, v14+s2, v15+s3)
213 s3 += ONE;
214 #endif
215 ip += VBPI*16;
216 op += VBPI*16;
217 #if GPR_TOO
218 op[0] = REVW_BE(REVW_BE(ip[0]) ^ (x0 + chacha_const[0]));
219 op[1] = REVW_BE(REVW_BE(ip[1]) ^ (x1 + chacha_const[1]));
220 op[2] = REVW_BE(REVW_BE(ip[2]) ^ (x2 + chacha_const[2]));
221 op[3] = REVW_BE(REVW_BE(ip[3]) ^ (x3 + chacha_const[3]));
222 op[4] = REVW_BE(REVW_BE(ip[4]) ^ (x4 + kp[0]));
223 op[5] = REVW_BE(REVW_BE(ip[5]) ^ (x5 + kp[1]));
224 op[6] = REVW_BE(REVW_BE(ip[6]) ^ (x6 + kp[2]));
225 op[7] = REVW_BE(REVW_BE(ip[7]) ^ (x7 + kp[3]));
226 op[8] = REVW_BE(REVW_BE(ip[8]) ^ (x8 + kp[4]));
227 op[9] = REVW_BE(REVW_BE(ip[9]) ^ (x9 + kp[5]));
228 op[10] = REVW_BE(REVW_BE(ip[10]) ^ (x10 + kp[6]));
229 op[11] = REVW_BE(REVW_BE(ip[11]) ^ (x11 + kp[7]));
230 op[12] = REVW_BE(REVW_BE(ip[12]) ^ (x12 + (counter & 0xffffffff)+BPI*iters+(BPI-1)));
231 op[13] = REVW_BE(REVW_BE(ip[13]) ^ (x13 + (counter >> 32)));
232 op[14] = REVW_BE(REVW_BE(ip[14]) ^ (x14 + np[0]));
233 op[15] = REVW_BE(REVW_BE(ip[15]) ^ (x15 + np[1]));
234 s3 += ONE;
235 ip += 16;
236 op += 16;
237 #endif
238 }
239
240 for (iters = inlen%(BPI*64)/64; iters != 0; iters--) {
241 vec v0 = s0, v1 = s1, v2 = s2, v3 = s3;
242 for (i = CHACHA_RNDS/2; i; i--) {
243 DQROUND_VECTORS(v0,v1,v2,v3);
244 }
245 WRITE_XOR(ip, op, 0, v0+s0, v1+s1, v2+s2, v3+s3)
246 s3 += ONE;
247 ip += 16;
248 op += 16;
249 }
250
251 inlen = inlen % 64;
252 if (inlen) {
253 __attribute__ ((aligned (16))) vec buf[4];
254 vec v0,v1,v2,v3;
255 v0 = s0; v1 = s1; v2 = s2; v3 = s3;
256 for (i = CHACHA_RNDS/2; i; i--) {
257 DQROUND_VECTORS(v0,v1,v2,v3);
258 }
259
260 if (inlen >= 16) {
261 STORE(op + 0, LOAD(ip + 0) ^ REVV_BE(v0 + s0));
262 if (inlen >= 32) {
263 STORE(op + 4, LOAD(ip + 4) ^ REVV_BE(v1 + s1));
264 if (inlen >= 48) {
265 STORE(op + 8, LOAD(ip + 8) ^ REVV_BE(v2 + s2));
266 buf[3] = REVV_BE(v3 + s3);
267 } else {
268 buf[2] = REVV_BE(v2 + s2);
269 }
270 } else {
271 buf[1] = REVV_BE(v1 + s1);
272 }
273 } else {
274 buf[0] = REVV_BE(v0 + s0);
275 }
276
277 for (i=inlen & ~15; i<inlen; i++) {
278 ((char *)op)[i] = ((char *)ip)[i] ^ ((char *)buf)[i];
279 }
280 }
281 }
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